State Key Laboratory of Analog and Mixed-Signal VLSI: IEEE SSCC Distinguished Lectures

Date: 5 AUG 2016 (Fri)
Time: 9:30am-11:40am
Venue: Lecture Hall, G013, N21, University of Macau

The Lectures are:
Lecture 1: “Design Techniques for High Performance Continuous-time Delta Sigma Modulators”
Lecture 2: “Little Known Aspects of Continuous-time Delta Sigma Modulators”

The speaker is:
Dr. Shanthi Pavan
Professor of Electrical Engineering
Indian Institute of Technology-Madras
Fellow of the Indian National Academy of Engineering



Shanthi Pavan obtained the B.Tech degree in Electronics and Communication Engg from the Indian Institute of Technology, Madras in 1995 and the M.S and Sc.D degrees from Columbia University, New York in 1997 and 1999 respectively. From 1997 to 2000, he was with Texas Instruments in Warren, New Jersey, where he worked on high speed analog filters and data converters. From 2000 to June 2002, he worked on microwave ICs for data communication at Bigbear Networks in Sunnyvale, California. Since July 2002, he has been with the Indian Institute of Technology-Madras, where he is now a Professor of Electrical Engineering. His research interests are in the areas of high speed analog circuit design and signal processing.

Dr.Pavan is the recipient of the IEEE Circuits and Systems Society Darlington Best Paper Award (2009), the Shanti Swarup Bhatnagar Award and the Swarnajayanthi Fellowship (from the Government of India) , the Young Faculty Recognition Award (from IIT Madras for excellence in teaching), the Technomentor Award from the India Semiconductor Association (2010). He is the Editor-in-Chief of the IEEE Transactions on Circuits and Systems: Part I - Regular Papers. He is a Fellow of the Indian National Academy of Engineering.



Lecture 1: Design Techniques for High Performance Continuous-time Delta Sigma Modulators

The designer of a continuous-time delta sigma modulator is faced with a myriad choices - how should I choose the oversampling ratio, order of the noise transfer function, and number of quantizer levels in my design? What architecture should I employ for the loop filter? What DAC should I use? What kind of opamp(s) are apt? After all, every published work seems to demonstrate the efficacy of the authors’ design choices.

This talk, in a tutorial fashion, dissects various choices and design and hopes to infuse clarity into the design process. Practical design examples, and case studies that present an apple-to-apple comparison of some popular techniques will be discussed.

Lecture 2: Little Known Aspects of Continuous-time Delta Sigma Modulators

Continuous-time Delta Sigma modulation has now become mainstream technology, finding its way into a variety of signal processing chains. A CTDSM is bag of contrasts - it is comprised of a very linear circuitry (the loop filter) and an intentionally very nonlinear part (the quantizer); operating partly in continuous-time and partly in discrete time. To top it all, these elements are part of a negative feedback loop. While these aspects make for very interesting study, they also come together to result in something that is incredibly relevant in practice.

This talk will focus on several little known aspects of CTDSMs which a designer should be aware of, and will dispel popular myths involving these data converters. They will lead into new ways of analyzing, designing and simulating CTDSMs.


The workshop is open to the public. For more details, please refer to the poster.

For enquiry: State Key Laboratory of Analog and Mixed-Signal VLSI
Tel. No: (853) 8822-8796 / (853) 8822-8035 / (853) 8822-4430