Journals and MagazinesTotal: 333
  • Sai Weng Sin, Seng-Pan U, R. P. Martins, "Generalized Circuit Techniques for Low-Voltage High-Speed Reset- and Switched-Opamps", IEEE Transactions on Circuits and Systems I - Regular Papers, vol. 55, Issue 8, pp. 2188 - 2201, Sep-2008.
  • Sai Weng Sin, U-Fat Chio, Seng-Pan U, R. P. Martins, "Statistical Spectra and Distortion Analysis of Time-Interleaved Sampling Bandwidth Mismatch", IEEE Trans. on Circuits and Systems II – Express Briefs, vol. 55, Issue 7, pp. 648-652, Jul-2008.
  • Pui In Mak, Seng-Pan U, R. P. Martins, "On the Design of Programmable-Gain Amplifier with Built-in Compact DC-Offset Cancellers for Very Low-Voltage WLAN Systems", ", IEEE Transactions on Circuits and Systems – I: Regular Papers, vol. 55, Issue 2, pp. 496-509, Mar-2008.
  • Pui In Mak, Seng-Pan U, R. P. Martins, "An Experimental 1-V Flexible-IF CMOS Analogue-Baseband Chain for IEEE 802.11a/b/g WLAN Receivers", IET Proceedings - Circuits, Devices and Systems, vol. 1, Issue 6, pp. 415-426, Dec-2007.
  • Pui In Mak, Seng-Pan U, R. P. Martins, "Transceiver Architecture Selection - Review, State-of-the-Art Survey and Case Study", IEEE Circuits and Systems Magazine, vol. 7, Issue 2, pp. 6-25, Jun-2007.
  • Pui In Mak, Seng-Pan U, R. P. Martins, "Two-Step Channel Selection – A Novel Technique for Reconfigurable Multistandard Transceiver Front-Ends", IEEE Transactions on Circuits and Systems-I, Regular Paper, Vol. 52, issue 7, pp 1302-1315, Jul-2005.
  • Seng-Pan U, Sai Weng Sin, R. P. Martins, "Exact Spectra Analysis of Sampled Signals with Jitter-Induced Nonuniformly Holding Effects", IEEE Transactions on Instrumentation and Measurement, vol. 53, Issue 4, pp. 1279-1299, Aug-2004.
  • Pui In Mak, Seng-Pan U, R. P. Martins, "Two-Step Channel Selection Technique by Programmable Digital-Double Quadrature Sampling for Complex Low-IF Receivers", IEE Electronics Letters, Vol. 39, issue 11, pp 825-827, May-2003.
  • Seng-Pan U, R. P. Martins, J.E.Franca, "A 2.5-V 57-MHz 15-Tap SC Bandpass Interpolating Filter with 320-MHz Output for DDFS System in 0.35-µm CMOS", IEEE Journal of Solid-State Circuits, Vol. 39, No.1, Feb-2002.
  • Seng-Pan U, R. P. Martins, J.E.Franca, "Improved Switched-Capacitor Interpolators with Reduced Sample-and-Hold Effects", IEEE Transactions on Circuits and Systems – II: Analog and Digital Signal Processing, vol. 47, Issue 8, pp. 665-684, Aug-2000.