■ Weng Ieng Mok, Pui In Mak, Seng-Pan U, R. P. Martins, "A Novel Architecture of Comparator-Mismatch-Free Multi-bit Pipeline ADC", Proceedings of the Regional Inter-University Postgraduate Electrical and Electronic Engineering Conference (RIUPEEEC), Session of Circuit and System, pp. 129-132, Jul-2006.

■ Chon-In Lao, Seng-Pan U, R. P. Martins, "An Expandable and Extendable High-Order Semi-MASH Sigma Delta Modulator", Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006, pp. 68-73, Jul-2006.

■ Ka Hou Ao Ieong, Seng-Pan U, R. P. Martins, "Design of a 1-V 10-bit 120MS/s Current-Steering DAC with Transient-Improved Technique", Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006, pp. 137-140, Jul-2006.

■ Sai Weng Sin, Seng-Pan U, R. P. Martins, "Novel Timing-Skew-Insensitive, Multi-phase Clock Generation Scheme for Parallel DAC and N-Path Filter", Proc. IEEE/IEE Regional Inter-University Post-graduate EEE Conference – RIUPEEEC 2006, pp. 133-136, Jul-2006.

■ Pui In Mak, Seng-Pan U, R. P. Martins, "A 1V 14mW-per-Channel Flexible-IF CMOS Analog-Baseband IC for 802.11a/b/g Receivers", in IEEE Symposium on VLSI Circuits (VLSI), Digest of Technical Papers, pp. 288-289, Jun-2006.

■ Sai Weng Sin, Seng-Pan U, R. P. Martins, "A Novel Low-Voltage Finite-Gain Compensation Technique for High-Speed Reset- and Switched-Opamp Circuits", in Proc. of 2004 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 3794-3797, May-2006.

■ Kin-Sang Chio, Seng-Pan U, R. P. Martins, "A Dual-Mode Low-Distortion Sigma-Delta Modulator with Relaxing Quantization Level", in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1892-1895, May-2006.

■ Chon-In Lao, Seng-Pan U, R. P. Martins, "A Novel Effective Bandpass Semi-MASH Sigma-Delta Modulator with Double-Sampling Mismatch-Free Resonator", in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 581-584, May-2006.

■ Jun-Xia Ma, Sai Weng Sin, Seng-Pan U, R. P. Martins, "A Power-Efficient 1.056 GS/s Resolution-Switchable 5-bit/6-bit Flash ADC for UWB Applications", in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 4305-4308, May-2006.

■ Pui In Mak, Seng-Pan U, R. P. Martins, "Design and Test Strategy underlying a Low-Voltage Analog-Baseband IC for 802.11a/b/g WLAN SiP Receivers", in Proc. of IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2473-2479, May-2006.